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Intel Compatible E40GQSFPSR Quick Spec:

A close up of a device  Description generated with very high confidence

Part Number: E40GQSFPSR E40GQSFPSR-EXT E40GQSFPSR-IND


Form Factor: QSFP

TX Wavelength: 850nm

Reach: 400m

Cable Type: MMF

Rate Category: 40GBase

Interface Type: eSR4

DDM: Yes

Connector Type: MPO

Optical Power Budget: 2.4 dB

TX Power Min/Max: -7.50 to 1.00 dBm

RX Power Min/Max: -9.9 to 2.4 dBm


Intel Compatible E40GQSFPSR Product Features


Intel Compatible E40GQSFPSR Overview

The E40GQSFPSR is a parallel 40 Gbps Quad Small Form-factor Pluggable (QSFP+) optical module. It provides increased port density and total system cost savings. The QSFP+ full-duplex optical module offers 4 independent transmit and receive channels, each capable of 10 Gbps operation for an aggregate data rate of 40 Gbps on 300 meters of OM3 multi-mode fiber. An optical fiber ribbon cable with an MTP/MPO connector can be plugged into the QSFP+ module receptacle. Proper alignment is ensured by the guide pins inside the receptacle. The cable usually can’t be twisted for proper channel to channel alignment.


Electrical connection is achieved through a pluggable 38-pin IPASS® connector. The module operates via a single +3.3V power supply. LVCMOS/LVTTL global control signals, such as Module Present, Reset, Interrupt and Low Power Mode, are available with the modules. A 2-wire serial interface is available to send and receive more complex control signals, and to receive digital diagnostic information. Individual channels can be addressed and unused channels can be shut down for maximum design flexibility. The product is designed with form factor, optical/electrical connection and digital diagnostic interface according to the QSFP+ Multi-Source Agreement (MSA). It has been designed to meet the harshest external


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operating conditions including temperature, humidity and EMI interference. The module offers very high functionality and feature integration, accessible via a two-wire serial interface.

Intel Compatible E40GQSFPSR Functional Diagram

This product converts the 4-channel 10 Gbps electrical input data into CWDM optical signals (light), by a driven 4- wavelength Distributed Feedback Laser (DFB) array. The light is combined by the MUX parts as a 40 Gbps data, propagating out of the transmitter module from the SMF. The receiver module accepts the 40 Gbps CWDM optical signals input, and de-multiplexes it into 4 individual 10Gbps channels with different wavelengths. Each wavelength is collected by a discrete avalanche photodiode (APD), and then outputted as electric data after amplified first by a TIA and then by a post amplifier. Figure 1 shows the functional block diagram of this product.


A single +3.3V power supply is required to power up this product. Both power supply pins VccTx and VccRx are internally connected and should be applied concurrently. As per MSA specifications the module offers 7 low speed hardware control pins (including the 2-wire serial interface): ModSelL, SCL, SDA, ResetL, LPMode, ModPrsL and IntL.


Module Select (ModSelL) is an input pin. When held low by the host, this product responds to 2-wire serial communication commands. The ModSelL allows the use of this product on a single 2-wire interface bus – individual ModSelL lines must be used.


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Laser Driver Array (4ch)

DFB

Laser Array (4ch)

Micro- optics

MPT/MPO

Laser Driver

DFB

Laser


Micro-

Array (4ch)

Array (4ch)

optics

Tx3 Tx2 Tx1 Tx0

Rx3 Rx2 Rx1 Rx0

Figure 1. Functional diagram

Serial Clock (SCL) and Serial Data (SDA) are required for the 2-wire serial bus communication interface and enable the host to access the QSFP+ memory map.


The ResetL pin enables a complete reset, returning the settings to their default state, when a low level on the ResetL pin is held for longer than the minimum pulse length. During the execution of a reset the host shall disregard all status bits until it indicates a completion of the reset interrupt. The product indicates this by posting an IntL (Interrupt) signal with the Data_Not_Ready bit negated in the memory map. Note that on power up (including hot insertion) the module should post this completion of reset interrupt without requiring a reset.


Low Power Mode (LPMode) pin is used to set the maximum power consumption for the product in order to protect hosts that are not capable of cooling higher power modules, should such modules be accidentally inserted.


Module Present (ModPrsL) is a signal local to the host board which, in the absence of a product, is normally pulled up to the host Vcc. When the product is inserted into the connector, it completes the path to ground though a resistor on the host board and asserts the signal. ModPrsL then indicates its present by setting ModPrsL to a “Low” state.


Interrupt (IntL) is an output pin. “Low” indicates a possible operational fault or a status critical to the host system. The host identifies the source of the interrupt using the 2-wire serial interface. The IntL pin is an open collector output and must be pulled to the Host Vcc voltage on the Host board.


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Absolute Maximum Ratings

Parameter

Symbol

Min

Max

Unit


Storage Temperature


Ts


-40


+85

°C

Power Supply Voltage

Vcc

-0.5

3.6

V

Relative Humidity (non- condensation)

RH

0

85

%

Damage Threshold, each Lane

TH

d

3.8


dBm


Recommended Operating Conditions

Parameter

Symbol

Mi n

Typ

Max

Unit

Operating Case Temp (Standard)

TOP

0


70

°C

Operating Case Temp (Indsutrial)

TOP

-40


85

°C

Power Supply Voltage

Vcc

3.135

3.3

3.465

V

Data Rate, each Lane



10.3125

11.2

Gb/s

Control Input Voltage High


2


Vcc

V

Control Input Voltage Low


0


0.8

V

Link Distance with G652

D



30

km


Recommended Power Supply Filter



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Electrical Characteristics


Parameter

Symbol

Min

Typ

Max

Unit

Power Consumption




1.5

W

Supply Current

Icc



450

mA

Transceiver Power-on Initialization Time (Note 1)




2000

ms


Electrical Characteristics – Transmitter (each lane)


Parameter

Symbol

Min Typ Max

Unit

Notes

Single-ended Input Voltage Tolerance (Note 2)


-0.3



4.0


V

Referred to TP1 signal common

AC Common Mode Input Voltage Tolerance (RMS)


15



mV

RMS

Differential Input Voltage Swing Threshold


50



mVpp

LOSA Threshold

Differential Input Voltage Swing

Vin,pp

180


1200

mVpp


Differential Input Impedance

Zin

90

100

110


Differential Input Return Loss


See IEEE 802.3ba 86A.4.1.1

dB

10MHz - 11.1GHz

J2 Jitter Tolerance

Jt2

0.17

UI


J9 Jitter Tolerance

Jt9

0.29

UI


Data Dependent Pulse Width Shrinkage (DDPWS)


Tolerance



0.07


UI


Eye Mask Coordinates {X1, X2,

Y1, Y2}


0.11, 0.31

95, 350

UI

mV

Hit Ratio = 5x10-5


Electrical Characteristics – Receiver (each lane)


Parameter

Symbol

Min

Typ

Max

Unit

Notes


Single-ended Output Voltage Threshold



-0.3



4.0


V

Referred to signal common

AC Common Mode Output Voltage Tolerance (RMS)




7.5

mV

RMS

Differential Output Voltage Swing Threshold

Vout,pp

600


800

mVpp


Differential Output Impedance

Aout

90

100

110

Ohm


Termination Mismatch at 1MHz




5

%


Differential Output Return Loss

See IEEE 802.3ba 86A.4.2.1 dB

10MHz - 11.1GHz

Common mode Output Return Loss

See IEEE 802.3ba 86A.4.2.2 dB

10MHz - 11.1GHz

Output Transition Time


28


ps

20% to 80%

J2 Jitter Tolerance

Jo2


0.42

UI


J9 Jitter Tolerance

Jo9


0.65

UI



Eye Mask Coordinates {X1, X2,

Y1, Y2}


0.29, 05


UI

Hit Ratio = 5x10-5


150,

425


mV


Notes:

  1. Power-on initialization time is the time from when the power supply voltages reach and remain above the minimum recommended operating supply voltages to the time when the moduleis fully functional.

  2. The single ended input voltage tolerance is the allowable range of the instantaneous input signals.


Optical Characteristics - Transmitter


Parameter

Symbol

Min

Typ

Max

Unit

Notes

Centre Wavelength

λ0

840

850

860

nm


RMS Spectral Width

∆λrms


0.5

.65

Nm


Average Launch Power (each Lane)

PAVG

-7.5


1.0

dBm


Optical Modulation Amplitude (OMA) (each Lane)

POMA

-2.8


3.0

dBm

1

Difference in Launch Power between any Two Lanes (OMA)


Ptx,diff



4.0


dB


Launch Power in OMA minus Transmitter and Dispersion Penalty (TDP), each Lane

OMATDP

-6.5



dBm


TDP, each Lane

TDP



3.5

dB


Extinction Ratio

ER

3



dB


Relative Intensity Noise

RIN



-128

dB/Hz

12dB reflection

Optical Return Loss Tolerance

TOL



12

dB


Encircled Flux


>86% at 19um<30% at 4.5 um



Transmitter Eye Mask Definition

{X2, X2, X3, Y1, Y2, Y3}


{0.23, 0.35, 0.43, 0.27, 0.35, 0.4}



Average Launch Power OFF (each lane)

Poff



-30

dBm


Note: Transmitter optical characteristics are measured with a single mode fiber.


Optical Characteristics - Receiver


Parameter

Symbol

Min

Typ

Max

Unit

Notes

Center Wavelength

λ0

840

850

860

nm


Damage Threshold, each Lane

THd

3.4



dBm

3

Average Receive Power, each Lane


-9.9


+2.4

dBm


Receiver Reflectance

RR



-12

dB


Receive Power (OMA) (each Lane)




3

dBm


Receiver Sensitivity in OMA (each Lane)

SEN



-11.1

dBm


Stressed Receiver Sensitivity (OMA), each Lane




-7.5

dBm

4

Peak Power (each lane)

PPR



4.0

dBm


LOS Assert

LOSA

-30



dBm


LOS Deassert

LOSD



-12

dBm


LOS Hysteresis

LOSH

0.5



dB


Vertical Eye Closure Penalty, each Lane



1.9


dB


Stressed Eye J2 Jitter, each Lane



0.3.


UI


Stressed Eye J9 Jitter, each Lane



0.47


UI


OMA of each aggressor lane



-0.4


dBm


Notes:

  1. Even if the TDP < 0.8 dB, the OMA min must exceed theminimum value specified here.

  2. The receiver shall be able to tolerate, without damage, continuous exposure to a modulated optical input signal having this power level on one lane. The receiver does not have to operate correctly at this input power.

  3. Measured with conformance test signal at receiver inputfor BER = 1x10-12.

  4. Vertical eye closure penalty and stressed eye jitter are test conditions for measuring stressed receiver sensitivity. They are not characteristics of the receiver.


Digitial Diagnostics Function

The following digital diagnostic characteristics are defined over the normal operating conditions unless otherwise specified.


Parameter

Symbol

Min

Typ

Max

Unit

Notes

Temperature monitor absolute error

DMITEMP

-3


3

deg. C

Over operating temperature range

Supply voltage monitor absolute error

DMIVCC

-0.15


0.1

V

Over Full operating range

Channel RX power monitor absolute error

DMIRX_CH

-2


2

dB

1

Channel Bias current monitor

DMIIbias_CH

-10%


10%

mA


Channel TX power monitor absolute error

DMITX_CH

-2


2

dB

1

Note 1: Due to measurement accuracy of different multi-mode fibers, there could be an additional ±1dB fluctuation, or ± 3dB total accuracy.


Mode-Conditioning Patch Cable

Figure 2. shows the orientation of the multi-mode facets of the optical connector.


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Fiber 1

Figure 2. Optical connector



Fiber

Description

PIN

Description

1

Rx (0)

7

Not used

2

Rx (1)

8

Not used

3

Rx (2)

9

Tx (3)

4

Rx (3)

10

Tx (2)

5

Not used

11

Tx (1)

6

Not used

12

Tx (0)


PIN Assignment and Function Definitions

PIN Assignment


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PIN Definition

PIN

Signal Name

Description

1

GND

Ground (1)

2

Tx2n

CML-I Transmitter 2 Inverted Data Input

3

Tx2p

CML-I Transmitter 2 Non-Inverted Data Input

4

GND

Ground (1)

5

Tx4n

CML-I Transmitter 4 Inverted Data Input

6

Tx4p

CML-I Transmitter 4 Non-Inverted Data Input

7

GND

Ground (1)

8

ModSelL

LVTLL-I Module Select

9

ResetL

LVTLL-I Module Reset

10

VCCRx

+3.3V Power Supply Receiver (2)

11

SCL

LVCMOS-I/O 2-Wire Serial Interface Clock

12

SDA

LVCMOS-I/O 2-Wire Serial Interface Data

13

GND

Ground (1)

14

Rx3p

CML-O Receiver 3 Non-Inverted Data Output

15

Rx3n

CML-O Receiver 3 Inverted Data Output

16

GND

Ground (1)

17

Rx1p

CML-O Receiver 1 Non-Inverted Data Output

18

Rx1n

CML-O Receiver 1 Inverted Data Output

19

GND

Ground (1)

20

GND

Ground (1)

21

Rx2n

CML-O Receiver 2 Inverted Data Output

22

Rx2p

CML-O Receiver 2 Non-Inverted Data Output

23

GND

Ground (1)

24

Rx4n

CML-O Receiver 4 Inverted Data Output

25

Rx4p

CML-O Receiver 4 Non-Inverted Data Output

26

GND

Ground (1)

27

ModPrsL

Module Present

28

IntL

Interrupt

29

VCCTx

+3.3V Power Supply Transmitter (2)

30

VCC1

+3.3V Power Supply

31

LPMode

LVTLL-I Low Power Mode

32

GND

Ground (1)

33

Tx3p

CML-I Transmitter 3 Non-Inverted Data Input

34

Tx3n

CML-I Transmitter 3 Inverted Data Input

35

GND

Ground (1)

36

Tx1p

CML-I Transmitter 1 Non-Inverted Data Input

37

Tx1n

CML-I Transmitter 1 Inverted Data Input

38

GND

Ground (1)

Notes:

  1. All Ground (GND) are common within the QSFP+ module and all module voltages are referenced to this potential unless noted otherwise. Connect these directly to the host board signal common ground plane.

  2. VccRx, Vcc1 and VccTx are the receiving and transmission power suppliers and shall be applied concurrently. The connector pins are each rated for a maximum current of 500mA.


Licensing

The following U.S. patents are licensed by Finisar to FluxLight, Inc.:

U.S. Patent Nos: 7,184,668, 7,079,775, 6,957,021, 7,058,310, 6,952,531, 7,162,160, 7,050,720